FIG. 1 shows a transmitter system incorporating an SMPA. It uses an analogue upconverter which delivers modulated signal at the carrier frequency fC to the input of an RF modulator. The RF modulator performs a conversion of the input modulated signal with non-constant envelope to the two-level pulse train that drives the input of an SMPA. At the PA output a reconstruction bandpass filter suppresses the unwanted harmonics or broadband quantization noise of the digital bit stream, and delivers an amplified version of the original narrow-band input RF signal to the antenna.
The RF modulator is usually realized as a pulse-width modulator (PWM) or employs bandpass delta-sigma modulator (BDSM) techniques. In case of PWM, output pulses can be very short (maximum pulse width is 1/fM, where fM is the modulator sampling frequency) which requires high fT of a power device to process the signal without additional power losses. In case of DSM the minimum pulse length will be equal to 1/fM. Common BDSM architecture uses the sampling frequency four times higher than the input fM=4fC. Thus, if the system in FIG. 1 has to be built at 2 GHz then the fM will be 8 GHz. The resulting pulses are also too short to be efficiently processed by the state-of-the-art power devices.
FIG. 2 shows a transmitter system which is based on digital modulator. One of the possible realizations is described in detail in [M. Helaoui, et. al, “A Novel Architecture of Delta-Sigma Modulator Enabling All-Digital Multiband Multistandard RF Transmitters Design,” IEEE Trans. Circuits and Syst. II: Exp. Briefs, vol. 55, no. 11, pp. 1129-1133, November 2008]. In this architecture, I and Q paths are processed separately by DSMs. Then they are upconverted to the needed carrier resulting in a two-level pulse train which drives following SMPA. The advantages of the system based on a digital modulator is that the transmitting system is reconfigurable; avoids A/D and/or D/A conversion; can use E/F/D/S PA classes to transmit non-constant envelope signals. The system in FIG. 2 produces the output pulse train with an average frequency of fC, which is too high for existing power transistors if the operation at GHz carrier frequency is considered.
Another implementation of the modulator in the analogue domain including an upconversion function which decreases the average output frequency can be found in [M. Nielsen, T. Larsen, “A Transmitter Architecture Based on Delta-Sigma Modulation and Switch-Mode Power Amplification,” IEEE Trans. Circuits and Syst. II, Exp. Briefs, vol. 54, no. 8, pp. 735-739, August 2007.]. This modulator processes the envelope amplitude and phase modulated carrier such a way that at the input of the SMPA only pulses with a width of 1/(2fC) are occurred.
A fully digital modulator with decreased average output frequency and, possibly, with only 1/(2fC) pulse widths in the output pulse train is highly demanded for the SMPA.